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We report our work on fabricating lithographically aligned patternedbackgates on thin (50-60$\mu$m) \Roman{roman3}-\Roman{roman5} semiconductorsamples using {\it single sided mask aligners only}. Along with this we alsopresent a way to photograph both sides of a thin patterned chip usinginexpensive infra-red light emitting diodes (LED) and an inexpensive (consumer)digital camera. A robust method of contacting both sides of a sample using anultrasonic bonder is described. In addition we present a mathematical model toanalyse the variation of the electrochemical potential through the doped layersand heterojunctions that are normally present in most GaAs based devices. Weutilise the technique and the estimates from our model to fabricate anelectron-hole bilayer device in which each layer is separately contacted andhas tunable densities. The electron and hole layers are separated by barrierseither 25 or 15nm wide. In both cases, the densities can be matched by usingappropriate bias voltages.

Patterned backgating using single-sided mask aligners: application to density-matched electron-hole bilayers