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A simple model is developed for the admittance of a metal-insulator-semiconductor (MIS) capacitor which includes the effect of a guard ring surrounding the Ohmic contact to the semiconductor. The model predicts most of the features observed in a MIS capacitor fabricated using regioregular poly(3-hexylthiophene) as the active semiconductor and polysilsesquioxane as the gate insulator. In particular, it shows that when the capacitor is driven into accumulation, the parasitic transistor formed by the guard ring and Ohmic contact can give rise to an additional feature in the admittance-voltage plot that could be mistaken for interface states. When this artifact and underlying losses in the bulk semiconductor are accounted for, the remaining experimental feature, a peak in the loss-voltage plot when the capacitor is in depletion, is identified as an interface (or near interface) state of density of ∼4×1010cm−2eV−1. Application of the model shows that exposure of a vacuum-annealed device to laboratory air produ...

Separating interface state response from parasitic effects in conductance measurements on organic metal-insulator-semiconductor capacitors