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Future nano-scale electronics built up from an Avogadro number of componentsneeds efficient, highly scalable, and robust means of communication in order tobe competitive with traditional silicon approaches. In recent years, theNetworks-on-Chip (NoC) paradigm emerged as a promising solution to interconnectchallenges in silicon-based electronics. Current NoC architectures are eitherhighly regular or fully customized, both of which represent implausibleassumptions for emerging bottom-up self-assembled molecular electronics thatare generally assumed to have a high degree of irregularity and imperfection.Here, we pragmatically and experimentally investigate important designtrade-offs and properties of an irregular, abstract, yet physically plausible3D small-world interconnect fabric that is inspired by modern network-on-chipparadigms. We vary the framework's key parameters, such as the connectivity,the number of switch nodes, the distribution of long- versus short-rangeconnections, and measure the network's relevant communication characteristics.We further explore the robustness against link failures and the ability andefficiency to solve a simple toy problem, the synchronization task. The resultsconfirm that (1) computation in irregular assemblies is a promising anddisruptive computing paradigm for self-assembled nano-scale electronics and (2)that 3D small-world interconnect fabrics with a power-law decaying distributionof shortcut lengths are physically plausible and have major advantages overlocal 2D and 3D regular topologies.

Nature-Inspired Interconnects for Self-Assembled Large-Scale Network-on-Chip Designs