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The transition between well-defined soft and hard breakdown modes to progressive breakdown in ultrathin silicon dioxide based dielectrics is studied by means of the statistics of residual time (the time from first breakdown to device failure). By stressing metal-oxide-semiconductor test capacitors with an oxide thickness of 2.2nm under different gate bias and temperatures, it is demonstrated that low voltages and temperatures favor stable hard and soft breakdown modes, while high temperatures and voltages lead to a progressive breakdown controlled regime. Our results support the idea that no significant change of the involved physics occurs in the transition from one breakdown regime to the other. The continuous transition from one regime to the other permits one to clearly identify progressive breakdown as hard breakdown, which always requires a certain time to reach the device failure conditions

Temperature-dependent transition to progressive breakdown in thin silicon dioxide based gate dielectrics