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Suppression of electronic defects induced by GeO x at the high- k gate oxide/SiGe interface is critical for implementation of high-mobility SiGe channels in complementary metal-oxide-semiconductor (CMOS) technology. Theoretical and experimental studies have shown that a low defect density interface can be formed with an SiO x -rich interlayer on SiGe. Experimental studies in the literature indicate a better interface formation with Al 2 O 3 in contrast to HfO 2 on SiGe; however, the mechanism behind this is not well understood. In this study, the mechanism of forming a low defect density interface between Al 2 O 3 /SiGe is investigated using atomic layer deposited (ALD) Al 2 O 3 insertion into or on top of ALD HfO 2 gate oxides. To elucidate the mechanism, correlations are made between the defect density determined by impedance measurements and the chemical and physical structures of the interface determined by high-resolution scanning transmission electron microscopy and electron energy loss spectroscopy. The compositional analysis reveals an SiO x rich interlayer for both Al 2 O 3 /SiGe and HfO 2 /SiGe interfaces with the insertion of Al 2 O 3 into or on top of the HfO 2 oxide. The data is consistent with the Al 2 O 3 insertion inducing decomposition of the GeO x from the interface to form an electrically passive, SiO x rich interface on SiGe. This mechanism shows that nanolaminate gate oxide chemistry cannot be interpreted as resulting from a simple layer-by-layer ideal ALD process, because the precursor or its reaction products can diffuse through the oxide during growth and react at the semiconductor interface. This result shows that in scaled CMOS, remote oxide ALD (oxide ALD on top of the gate oxide) can be used to suppress electronic defects at gate oxide semiconductor interfaces by oxygen scavenging.

Engineering High-k/SiGe Interface with ALD Oxide for Selective GeOx Reduction

Engineering High-k/SiGe Interface with ALD Oxide for Selective GeO_x Reduction