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In 1963, Moll and Tarui suggested that the field-effect conductance of asemiconductor could be controlled by the remanent polarization of aferroelectric (FE) material to create a ferroelectric field-effect transistor(FE-FET). However, subsequent efforts to produce a practical, compact FE-FEThave been plagued by low retention and incompatibility with Complementary MetalOxide Semiconductor (CMOS) process integration. These difficulties led to thedevelopment of trapped-charge based memory devices (also called floating gateor flash memory), and these are now the mainstream non-volatile memory (NVM)technology. Over the past two decades, advances in oxide FE materials haverejuvenated the field of ferroelectrics and made FE random access memories(FE-RAM) a commercial reality. Despite these advances, commercial FE-RAM basedon lead zirconium titanate (PZT) has stalled at the 130 nm due to processchallenges.The recent discovery of scandium doped aluminum nitride (AlScN) as aCMOS compatible ferroelectric presents new opportunities for direct memoryintegration with logic transistors due to the low temperature of AlScNdeposition (approx. 350 C). This temperature is compatible with CMOS back endof line processes. Here, we present a FE-FET device composed of an AlScN FEdielectric layer integrated with a channel layer of a van der Waalstwo-dimensional (2D) semiconductor, MoS2. Our devices show an ON/OFF ratio ~10^6, concurrent with a normalized memory window of 0.3 V/nm. The devices alsodemonstrate stable, two-state memory retention for up to 10^4 seconds. Oursimulations and experimental results suggest that the combination of AlScN and2D semiconductors is nearly ideal for low power FE-FET memory. These resultsdemonstrate a new approach in embedded memory and in-memory computing, andcould even lead to effective neuromorphic computing architectures.

Post-CMOS Compatible Aluminum Scandium Nitride/2D Channel Ferroelectric Field-Effect-Transistor