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A mathematical model of the voltage drop which arises in on-chip powerdistribution networks is used to compare the maximum voltage drop in the caseof different geometric arrangements of the pads supplying power to the chip.These include the square or Manhattan power pad arrangement which currentlypredominates, as well as equilateral triangular and hexagonal arrangements. Inagreement with findings in the literature and with physical and SPICE models,the equilateral power pad arrangement, independent of the underlying power meshconfiguration, is found to minimize the maximum voltage drop. This headlinefinding is a consequence of relatively simple formulas for the voltage drop,with explicit error bounds, which are established using complex analysistechniques, and elliptic functions in particular.

The maximum voltage drop in an on-chip power distribution network: analysis of square, triangular and hexagonal power pad arrangements