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Currently there is a wide variety of logic control design methodologies used in industrial logic design. These methodologies include ladder diagrams, function block diagrams, sequential function charts, and flow charts, but driven by a desire for verifiability, academics are developing additional logic control design methodologies, such as modular finite state machines and Petri nets. Using these, important properties of programs can be verified and some logic can be generated automatically from a part plan. The main contribution of this paper is to define methods for measuring programs written in different methodologies, so that the performance of the methodologies can be compared

Methods of measuring the size and complexity of PLC programs in different logic control design methodologies