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Manycores are consolidating in HPC community as a way of improvingperformance while keeping power efficiency. Knights Landing is the recentlyreleased second generation of Intel Xeon Phi architecture. While optimizingapplications on CPUs, GPUs and first Xeon Phi's has been largely studied in thelast years, the new features in Knights Landing processors require the revisionof programming and optimization techniques for these devices. In this work, weselected the Floyd-Warshall algorithm as a representative case study of graphand memory-bound applications. Starting from the default serial version, weshow how data, thread and compiler level optimizations help the parallelimplementation to reach 338 GFLOPS.

Blocked All-Pairs Shortest Paths Algorithm on Intel Xeon Phi KNL Processor: A Case Study