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We present an experiment which has demonstrated that methods and tools developed in the context of black box conformance testing of communication protocols can be efficiently used for testing the cache coherency protocol of a hardware multi-processor architecture. We have used the automatic conformance tests generator TGV developed by INRIA to generate abstract tests and we have developed a software in order to make them executable in the real test environment of Bull. The TGV approach has been considered by the hardware testing community as a serious alternative to usual random test generation. It overwhelms the well known debugging and coverage problems linked to this kind of technic.

Hardware Testing Using a Communication Protocol Conformance Testing Tool