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Factors that contribute to the rapid increase in power dissipation as afunction of input bandwidth in high speed electronic Analog-to-DigitalConverters (ADCs) are discussed. We find that the figure of merit (FOM),defined as the energy required per conversion step, increases linearly withbandwidth for high-speed ADCs with moderate to high resolution, orequivalently, the power dissipation increases quadratically. It is shown thatby use of photonic time-stretch technique, it is possible to have ADCs in whichthis FOM remains constant for up to 10 GHz input RF frequency. Using thistechnique, it is also possible to overcome the barrier to achieving highresolution caused by clock jitter and speed limitations of electronics in suchADCs.  Use of optics is actively being pursued for reducing power dissipation andachieving higher data-rates for board-level and chip-level serial communicationlinks. In the same manner, we expect that optics will also help in reducingpower dissipation in high-speed ADCs in addition to providing broaderbandwidths.

Power Scaling in High Speed Analog-to-Digital Converters using Photonic Time Stretch Technique