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This paper evaluates the use of pin and cycle accurate SystemC models forembedded system design exploration and early software development. The targetsystem is MicroBlaze VanillaNet Platform running MicroBlaze uClinux operatingsystem. The paper compares Register Transfer Level (RTL) Hardware DescriptionLanguage (HDL) simulation speed to the simulation speed of several differentSystemC models. It is shown that simulation speed of pin and cycle accuratemodels can go up to 150 kHz, compared to 100 Hz range of HDL simulation.Furthermore, utilising techniques that temporarily compromise cycle accuracy,effective simulation speed of up to 500 kHz can be obtained.

Evaluation of SystemC Modelling of Reconfigurable Embedded Systems