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Safety-critical embedded systems having to meet real-time constraints areexpected to be highly predictable in order to guarantee at design time thatcertain timing deadlines will always be met. This requirement usually preventsdesigners from utilizing caches due to their highly dynamic, thus hardlypredictable behavior. The integration of scratchpad memories represents analternative approach which allows the system to benefit from a performance gaincomparable to that of caches while at the same time maintaining predictability.In this work, we compare the impact of scratchpad memories and caches on worstcase execution time (WCET) analysis results. We show that caches, despiterequiring complex techniques, can have a negative impact on the predicted WCET,while the estimated WCET for scratchpad memories scales with the achievedPerformance gain at no extra analysis cost.

Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software