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Coarse-grained reconfigurable architectures aim to achieve both goals of highperformance and flexibility. However, existing reconfigurable arrayarchitectures require many resources without considering the specificapplication domain. Functional resources that take long latency and/or largearea can be pipelined and/or shared among the processing elements. Thereforethe hardware cost and the delay can be effectively reduced without anyperformance degradation for some application domains. We suggest suchreconfigurable array architecture template and design space exploration flowfor domain-specific optimization. Experimental results show that our approachis much more efficient both in performance and area compared to existingreconfigurable architectures.

Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization