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This paper presents a technique for eliminating redundant cache-tag andcache-way accesses to reduce power consumption. The basic idea is to keep asmall number of Most Recently Used (MRU) addresses in a Memory Address Buffer(MAB) and to omit redundant tag and way accesses when there is a MAB-hit. Sincethe approach keeps only tag and set-index values in the MAB, the energy andarea overheads are relatively small even for a MAB with a large number ofentries. Furthermore, the approach does not sacrifice the performance. In otherwords, neither the cycle time nor the number of executed cycles increases. Theproposed technique has been applied to Fujitsu VLIW processor (FR-V) and itspower saving has been estimated using NanoSim. Experiments for 32kB 2-way setassociative caches show the power consumption of I-cache and D-cache can bereduced by 40% and 50%, respectively.

A Way Memoization Technique for Reducing Power Consumption of Caches in Application Specific Integrated Processors