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This communication deals with a theoretical study of the hot spot onset (HSO)in cellular bipolar power transistors. This well-known phenomenon consists of acurrent crowding within few cells occurring for high power conditions, whichsignificantly decreases the forward safe operating area (FSOA) of the device.The study was performed on a virtual sample by means of a fast, fullyanalytical electro-thermal simulator operating in the steady state regime andunder the condition of imposed input base current. The purpose was to study thedependence of the phenomenon on several thermal and geometrical factors and totest suitable countermeasures able to impinge this phenomenon at higher biasesor to completely eliminate it. The power threshold of HSO and its localizationwithin the silicon die were observed as a function of the electrical biasconditions as for instance the collector voltage, the equivalent thermalresistance of the assembling structure underlying the silicon die, the value ofthe ballasting resistances purposely added in the emitter metalinterconnections and the thickness of the copper heat spreader placed on thedie top just to the aim of making more uniform the temperature of the siliconsurface.

The Hot-Spot Phenomenon and its Countermeasures in Bipolar Power Transistors by Analytical Electro-Thermal Simulation