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Multiple-valued Logic (MVL) circuits are one of the most attractiveapplications of the Monostable-to-Multistable transition Logic (MML), and theyare on the basis of advanced circuits for communications. The operation of suchquantizer has two steps : sampling and holding. Once the quantizer samples thesignal, it must maintain the sampled value even if the input changes. However,holding property is not inherent to MML circuit topologies. This paper analysesthe case of an MML ternary inverter used as a quantizer, and determines therelations that circuit representative parameters must verify to avoid thismalfunction.

Holding Dissapearance in RTD-based Quantizers