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The re-use of pre-designed blocks is a well-known concept of the softwaredevelopment. This technique has been applied to System-on-Chip (SoC) designwhose complexity and heterogeneity are growing. The re-use is made thanks tohigh level components, called virtual components (IP), available in more orless flexible forms. These components are dedicated blocks: digital signalprocessing (DCT, FFT), telecommunications (Viterbi, TurboCodes),... Theseblocks rest on a model of fixed architecture with very few degrees ofpersonalization. This rigidity is particularly true for the communicationinterface whose orders of acquisition and production of data, the temporalbehavior and protocols of exchanges are fixed. The successful integration ofsuch an IP requires that the designer (1) synchronizes the components (2)converts the protocols between "incompatible" blocks (3) temporizes the data toguarantee the temporal constraints and the order of the data. This phaseremains however very manual and source of errors. Our approach proposes aformal modeling, based on an original Ressource Compatibility Graph. Thesynthesis flow is based on a set of transformations of the initial graph tolead to an interface architecture allowing the space-time adaptation of thedata exchanges between several components.

M\'ethodologie de mod\'elisation et d'impl\'ementation d'adaptateurs spatio-temporels