Open AccessMillimeter‐Wave High‐Linear CMOS Low‐Noise Amplifier Using Multiple‐Gate Transistors
Author(s) -
Kim Jihoon,
Choi Wooyeol,
Quraishi Abdus Samad,
Kwon Youngwoo
Publication year - 2011
Publication title -
etri journal
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.295
H-Index - 46
eISSN - 2233-7326
pISSN - 1225-6463
DOI - 10.4218/etrij.11.0210.0235
Subject(s) - noise figure , cmos , amplifier , common gate , low noise amplifier , linearity , transistor , electrical engineering , dbm , extremely high frequency , electronic engineering , noise (video) , materials science , engineering , computer science , telecommunications , voltage , artificial intelligence , image (mathematics)
A millimeter‐wave (mm‐wave) high‐linear low‐noise amplifier (LNA) is presented using a 0.18 µm standard CMOS process. To improve the linearity of mm‐wave LNAs, we adopted the multiple‐gate transistor (MGTR) topology used in the low frequency range. By using an MGTR having a different gate‐source bias at the last stage of LNAs, third‐order input intercept point (IIP3) and 1‐dB gain compression point (P 1dB ) increase by 4.85 dBm and 4 dBm, respectively, without noise figure (NF) degradation. At 33 GHz, the proposed LNAs represent 9.5 dB gain, 7.13 dB NF, and 6.25 dBm IIP3.