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DESIGN OF ONCHIP LOW DROPOUT (LDO) REGULATOR FOR POWER MANAGEMENT APPLICATION
Author(s) -
Apratim Chatterjee,
P. Manikandan
Publication year - 2017
Publication title -
asian journal of pharmaceutical and clinical research
Language(s) - English
Resource type - Journals
eISSN - 2455-3891
pISSN - 0974-2441
DOI - 10.22159/ajpcr.2017.v10s1.19989
Subject(s) - cadence , dropout (neural networks) , regulator , computer science , linear regulator , low dropout regulator , power consumption , node (physics) , transient (computer programming) , power (physics) , control theory (sociology) , dropout voltage , electronic engineering , voltage regulator , voltage , engineering , artificial intelligence , electrical engineering , control (management) , chemistry , structural engineering , biochemistry , quantum mechanics , machine learning , physics , gene , operating system
A low dropout regulator is proposed in this paper. The regulator is designed with classic five pack model to decrease the number of devices and make the design compact and also reduce the power consumption. The system is designed and simulated in cadence virtuoso environment under 180nm technology node. Three models of LDO is proposed in this paper, with all having same error amplifier but with small variations. The advantages and disadvantages of each model will be discussed in the paper. The LDOs have linear characteristic over a good input range. It has good transient response to load variation. 

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