Open AccessEfficient Implementation of Radix-4 Single pathDelay Feedback (SDF) FFT ProcessorsK
Author(s) -
K. Hanumantha Rao,
C. Kumar Charlie Paul
Publication year - 2016
Publication title -
indian journal of science and technology
Language(s) - English
Resource type - Journals
eISSN - 0974-6846
pISSN - 0974-5645
DOI - 10.17485/ijst/2016/v9i12/73128
Subject(s) - twiddle factor , fast fourier transform , computer science , multiplier (economics) , virtex , split radix fft algorithm , parallel computing , arithmetic , field programmable gate array , algorithm , computer hardware , mathematics , fourier transform , short time fourier transform , macroeconomics , mathematical analysis , economics , fourier analysis
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