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Design of Low Power Digit-serial Adder Filter
Author(s) -
P. R. Gumble,
Ladhake S.A
Publication year - 2015
Publication title -
ssrg international journal of electronics and communication engineering
Language(s) - English
Resource type - Journals
eISSN - 2349-9184
pISSN - 2348-8549
DOI - 10.14445/23488549/ijece-v2i10p103
Subject(s) - numerical digit , adder , computer science , power (physics) , arithmetic , mathematics , telecommunications , physics , quantum mechanics , latency (audio)

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