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The key features of a single-photon avalanche diode (SPAD) are its ability to detect a single photon and provide a digital signal output. The avalanche multiplication process, which generates a detectable electrical signal that can be amplified up to a high voltage without the need for additional circuits, allows SPADs to detect individual photons. Specifically, a SPAD fabricated in CMOS technology can detect near-infrared (NIR) signals, which is a crucial requirement in many applications such as light detection and ranging (LiDAR), time-of-flight (ToF) imaging, and NIR optical tomography. These applications require specific performance characteristics, for example, high photon detection probability (PDP). In this article, we propose an optimized SPAD developed based on 40 nm backside illuminated (BSI) CMOS image sensor (CIS) technology. The SPAD is designed and fabricated using a heavily doped p-type (P&#x002B;) and a retrograde doped deep n-well (DNW) junction. The doping-optimized guard-ring (GR) for the expansion of the avalanche multiplication region maximizes PDP, while maintaining its original capability, premature edge breakdown (PEB) prevention at the edge of the junction. We demonstrate the effectiveness of GR optimization by comparing the electrical and optical experimental results with the conventional SPAD. The proposed double-avalanche-region (DAR) SPAD achieves a peak PDP of about 89&#x0025; at the wavelength of 700 nm and a PDP of 45&#x0025; at 940 nm, which are the highest values among SPADs reported so far at the excess bias voltage of 2.5 V. The dark count rate (DCR) is 27 cps&#x002F;&#x03BC;m2 and the full width at half-maximum (FWHM) of the timing jitter is 89 ps at the same operating condition.

Back-Illuminated Double-Avalanche-Region Single-Photon Avalanche Diode