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In this study, a novel family of single-phase, bridgeless, three-level power factor correction (PFC) topologies was proposed based on the embedded construction scheme. These technologies combined bridgeless PFC circuits and multilevel technology. These topologies are highly suitable for applications with high efficiency and high power density requirements. This family has six topologies. The derivation, operating principle, mathematical model, and circuit performance of the proposed topologies were analyzed. Furthermore, for this family of topologies, a four-carrier phase disposition pulse width modulation (FCPD-PWM) method and a system design method were proposed. Finally, an experimental prototype with an out-put power of 1 kW was designed. The circuit can work in the PFC mode under the rated working conditions and reflects the characteristics of three levels. The circuit can respond quickly and work normally under a variety of complex working conditions and can work in a diode rectification mode when the driving voltage signal is lost. The experimental results demonstrated the feasibility of the topology derived from the proposed embedded construction scheme and the effectiveness of the FCPD-PWM method for driving the proposed three-level conversion circuit.

Single-Phase Bridgeless Three-Level Power Factor Correction Topologies Based on the Embedded Construction Scheme