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This paper presents a 28 nm cryo-CMOS system-on-chip (SoC) for the dispersive readout of superconducting qubits operating between 6.5-8.1 GHz at 4 K. The SoC includes a quadrature VCO and a full zero-IF transmitter and receiver chain, including 200 MS/s7-bit DACs, ADCs, and digital. It can generate pulses up to 640 ns duration, and it attains a very low-power readout operation (9.8 mW) compared to its counterparts with 0.5-0.6 dB noise figure, 65&#x2013;89 dB gain, and -71 dBm maximum TX output power at 4 K. Furthermore, with its duty-cycled mode, the SoC reduces the average power dissipation for the readout application.

A 28nm 6.5-8.1GHz 1.16mW/qubit Cryo-CMOS System-an-Chip for Superconducting Qubit Readout