Wire segmentation for printed circuit board using deep convolutional neural network and graph cut model

Printed circuit board wire segmentation based on computed tomography (CT) image can help subsequently locate and estimate inner faults of circuit in an automatic and non‐destructive manner. However, CT imaging is prone to suffer from scattered artefacts, metal artefacts and other interference, destroying compact boundary structures of wires. Wires have the characteristic of dense local distribution, and massive vias, pads, and coppers can appear close to wires, resulting in mazy recognition surroundings. The above‐mentioned problems bring great difficulty for high‐accuracy recognition and location of wire segmentation. In this study, considering that deep convolutional neural network (DCNN) with powerful feature representation can recognise wires in confused surroundings, and graph cut (GC) model relying on grayscale and local texture information specialises in protecting edge structures of wires, the authors propose an effective framework called DCNN‐GC that employs DCNN to obtain global semantic prior to guide the GC model to accomplish satisfactory wire segmentation. The authors qualitative and quantitative results demonstrate outstanding performance, and achieve overwhelming intersection over union compared with traditional and DCNN‐based methods.