A dual‐band class‐E power amplifier with concurrent matching network in 0.18‐μm CMOS

In this letter, a dual‐band class‐E CMOS power amplifier (PA) in 0.18‐μm CMOS process is presented. By using concurrent dual‐band impedance matching network, the proposed dual‐band PA can achieve high efficiency in a compact chip area. This dual‐band class‐E PA demonstrates the power gain ≥ 8.4 dB, P sat  ≥ 21.4 dBm with power added efficiency ≥ 31% in a compact chip size of 0.5 mm 2 . This dual‐band class‐E PA achieves comparable power area density of 284.5 (mW/mm 2 ) with other state‐of‐the‐art class‐E PAs at higher frequency.