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Surveillance systems, autonomous vehicles, human monitoring systems, andvideo retrieval are just few of the many applications in which 3D ConvolutionalNeural Networks are exploited. However, their extensive use is restricted bytheir high computational and memory requirements, especially when integratedinto systems with limited resources. This study proposes a toolflow thatoptimises the mapping of 3D CNN models for Human Action Recognition onto FPGAdevices, taking into account FPGA resources and off-chip memorycharacteristics. The proposed system employs Synchronous Dataflow (SDF) graphsto model the designs and introduces transformations to expand and explore thedesign space, resulting in high-throughput designs. A variety of 3D CNN modelswere evaluated using the proposed toolflow on multiple FPGA devices,demonstrating its potential to deliver competitive performance compared toearlier hand-tuned and model-specific designs.

fpgaHART: A toolflow for throughput-oriented acceleration of 3D CNNs for HAR onto FPGAs