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Caches at CPU nodes in disaggregated memory architectures amortize the highdata access latency over the network. However, such caches are fundamentallyunable to improve performance for workloads requiring pointer traversals acrosslinked data structures. We argue for accelerating these pointer traversalscloser to disaggregated memory, in a manner that preserves expressiveness forsupporting various linked structures, ensures energy efficiency andperformance, and supports distributed execution. We design CHASE to meet allthe above requirements for pointer-traversal workloads on rack-scaledisaggregated memory through the principled use of FPGAbased SmartNICs andprogrammable network switches. Our evaluation of CHASE shows that it enableslow-latency, highthroughput, and energy-efficient execution for a wide range ofcommon pointer traversal workloads on disaggregated memory that fare poorlywith caching alone.

CHASE: Accelerating Distributed Pointer-Traversals on Disaggregated Memory