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Intel Page Modification Logging (PML) is a novel hardware feature fortracking virtual machine (VM) accessed memory pages. This task is essential intoday's data centers since it allows, among others, checkpointing, livemigration and working set size (WSS) estimation. Relying on the Xen hypervisor,this paper studies PML from three angles: power consumption, efficiency, andperformance impact on user applications. Our findings are as follows. First,PML does not incur any power consumption overhead. Second, PML reduces by up to10.18% both VM live migration and checkpointing time. Third, PML slightlyreduces by up to 0.95% the performance degradation on applications incurred bylive migration and checkpointing. Fourth, PML however does not allow accurateWSS estimation because read accesses are not tracked and hot pages cannot beidentified. A naive extension of PML for addressing these limitations couldlead to severe performance degradation (up to 34.8%) for the VM whose WSS iscomputed.  This paper presents Page Reference Logging (PRL), a smart extension of PMLfor allowing both read and write accesses to be tracked. It does this withoutimpacting user VMs. The paper also presents a WSS estimation system whichleverages PRL and shows how this algorithm can be integrated into a data centerwhich implements memory overcommitment. We implement PRL and the WSS estimationsystem under Gem5, a very popular hardware simulator. The evaluation resultsvalidate the accuracy of PRL in the estimation of WSS. They also show that PRLincurs no performance degradation for user VMs.

Intel Page Modification Logging, a hardware virtualization feature: study and improvement for virtual machine working set estimation