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The quantum-dot cellular automata (QCA) nano-technique has attracted computerscientists due to its noticeable features such as low power consumption andsmall size. Many papers have been published in the literature about theutilization of this technology for de-signing many QCA circuits and forpresenting logic gates in an optimal structure. The T flip-flop, which is anessential part of digital designs, can be used to design synchronous andasynchronous counters. This paper presents a novel T flip-flop structure in anoptimal form. The presented novel gate was used to design an N-bit binarysynchronous counter. The QCADesigner software was used to verify the designedcircuits and to present the simulation results, while the QCAPro tool was usedfor the power analysis. The proposed design required minimal power and showedgood improvements over previous designs.

Synchronous Counter Design Using Novel Level Sensitive T-FF in QCA Technology