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—ECG (electrocardiogram) currently is the most effective way to detect the heart condition. Previously people have to do the ECG recording in hospital. But the ECG abnormal situation is unsustainable, because the symptoms usually disappear when the patient is sent to the hospital. This may lead to losing the early treatment opportunity. In this paper, a Holter system is designed based on STM32 and FPGA dual-core. ECG data acquisition, LCD display, and data storage in SD card are accomplished. In addition, an ECG de-noised method which combines Stationary Wavelet Transform with Wavelet Transform Scale factor Estimate is accomplished on FPGA to eliminate the noise of ECG. The system can be used anywhere at any time, so it's an ideal device for remote health care. Keywords-ECG; FPGA; STM32; SWT; WTSE; de-noise I. I NTRODUCTION Along with the rapid economic development as well as changes in lifestyle, cardiovascular disease has become one of the most important reasons that cause death recently. People may lose lives even when the heart doesn’t work only for a second. ECG signal objectively expresses the heart activity and is a typical biological electric signal. The correct diagnosis of cardiovascular disease depends on the accuracy of ECG acquisition. ECG recorders are often called Holter recorders, named after the first ECG recorder developed by N. J. Holter in 1961[1]. ECG signal is a kind of very weak electrical signal whose amplitude is only 0.05mV-5mV, and the spectrum scope mainly focus on 0.05 ~ 100Hz[2], so it's often drowned in Strong Noise Jamming. Therefore ECG signal has a disadvantage of low signal-to-noise ratio (SNR). However we can’t extract useful ECG characteristics from the distortion waveform, so restraining and removing the noise from ECG effectively is very important in ECG single processing. The Holter recorder described in this paper is based on STM32 and FPGA dual-core. Taking as main processor, STM32 is used to manage the whole system, such as input scan, wave display, data storage in SD card, and operate the FPGA. Taking as co-processor, FPGA consists a large number of programmable logic blocks, which can each implement an amount of digital logic, and have a high execution speed, so FPGA is used to run the filtering algorithm to meet the requirements of real-time processing, the Analog-to-digital converter module is also operated by FPGA. Two cores are connected by Parallel bus. II. HARDWARE DESIGN In the acquisition system, the hardware consists of electrodes, amplifier circuit, Analog-to-digital converter module, FPGA, STM32, SD Card and LCD module. The system-level description is shown in Figure1.

Design of a dual-core Holter Systerm Based on STM32 and FPGA