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This work represents a novel approach for implementing a VCO Based ADC using Current Mode Logic (CML). It primarily focuses on applicability of CML logic for building digital circuits and systems that run at very low voltages. Many ADC’s require low power, high speed with less area and delay. The need for this low power, small delay, area efficient and high speed ADC is pushing towards the use of Current Mode Logic (CML). The VCO Based ADC was designed in 45nm technology at a power supply of 1V using cadence tools. The VCO was implemented using the 8 stage Differential Delay Cell. VCO is followed by 16 1-bit Reset Counters and a 16-bit Adder. The Reset Counter consists of One Divider, Two D Flipflop’s and an XOR gate.

Voltage Controlled Oscillator Based Analog to Digital Converter using Current Mode Logic Approach