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New approach to hardware FIR filter implementation is described in this paper. Method includes the conver- sion to the frequency domain, as well as the principles of residue number systems and number-theoretic transforms. Pa- rameterized RTL IP-core generators were implemented for both conventional and developed methods. These IP genera- tors were used to implement different devices for different filter orders and input widths. Filters were synthesized, and re- sulting time and hardware evaluation allow one to consider the effectiveness of the method compared with the conven- tional realization of FIR filter.

Hardware Implementation of Fir Filter Based on Number-theoretic Fast Fourier Transform in Residue Number System