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Since hardware oftentimes serves as the root of trust in our moderninterconnected world, malicious hardware manipulations constitute a ubiquitousthreat in the context of the Internet of Things (IoT). Hardware reverseengineering is a prevalent technique to detect such manipulations.  Over the last years, an active research community has significantly advancedthe field of hardware reverse engineering. Notably, many open researchquestions regarding the extraction of functionally correct netlists from FieldProgrammable Gate Arrays (FPGAs) or Application Specific Integrated Circuits(ASICs) have been tackled. In order to facilitate further analysis of recoverednetlists, a software framework is required, serving as the foundation forspecialized algorithms. Currently, no such framework is publicly available.  Therefore, we provide the first open-source gate-library agnostic frameworkfor gate-level netlist analysis. In this positional paper, we demonstrate theworkflow of our modular framework HAL on the basis of two case studies andprovide profound insights on its technical foundations.

Highway to HAL: Open-Sourcing the First Extendable Gate-Level Netlist Reverse Engineering Framework