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Compared to planar NAND flash memory, 3D NAND flash memory uses a new flash cell design, and vertically stacks dozens of silicon layers in a single chip. This allows 3D NAND flash memory to increase storage density using a much less aggressive manufacturing process technology than planar NAND. The circuit-level and structural changes in 3D NAND flash memory significantly alter how different error sources affect the reliability of the memory. Our goal is to (1) identify and understand these new error characteristics of 3D NAND flash memory, and (2) develop new techniques to mitigate prevailing 3D NAND flash errors.

Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation