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Performanceof two network-on-chip (NoC) topologiesiscompared for the use in multicore processors. The performance evaluation is supported by the CINSimsimulator. This simulator has been developed to model a variety of network topologies that are based on atomic components such as buffers, routers, traffic generators, and target buffers. Thedevelopment of this simulator wasdriven by the investigation of networks-on-chip. But off-chip networks can be examined aswell . Two examples for NoC topologies,amesh anda bidirectional interconnection network, are compared. Unicast traffic is used as well as multicast and local traffic, which bothrepresent a significant part of the network traffic for evaluating multicoreprocessors. In addition to theperformance, themean distance, the diameter, and the buffer cost are calculated for both network topologies. Theresults show that bidirectional multistage interconnection networksoutperform meshes. A clearly better scalability i s shown by the bidirectional multistage interconnection networks. Categor ies and Subject Descriptors C.1.2 [Processor Architectures]: Multiple Data Stream Architectures (Multiprocessors—parallel processors; C.2.1 [ComputerCommunication Networks]: Network Architecture and Design— network topology; C.4 [Performanceof Systems]: Modeling Techniques

Comparison of network-on-chip topologies for multicore systems considering multicast and local traffic