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The problem of cache thrashing occurs in shared memory multiprocessors with local processor caches and a write-invalidate cache coherency protocol. Cache conflict, one of the causes of thrashing, arises when several processors try to write into different addresses of the same cache line. It is shown that parallel execution of loop iterations on a machine with a long cache line can cause significantly more thrashing than identical execution on a machine with a cache line size of one or two words. Transformations that can be applied to :parallel loops to reduce cache conflicts and a method fcm trading off this reduction against the possible increase in synchronization and scheduling overheads are described. The applicability of this technique is shown by an empirical analysis of FORTRAN loops in the Perfect Club benchmark suite.

Automatic transformation of FORTRAN loops to reduce cache conflicts