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Through-silicon vias (TSV) are very important for wafer-level packaging as they provide patterning holes through thick silicon dies to integrate and interconnect devices which are stacked in the z-direction. For economic processing, TSV fabrication primarily needs to be cost effective, especially for a high throughput. Furthermore, a lithography process for TSV has to be stable enough to allow patterning on prestructured substrates with inhomogeneous topography. This can be addressed by an exposure process which offers a large depth of focus. We have developed a mask-aligner lithography process based on the use of a double-sided photomask to realize aerial images that meet these constraint

Optimized lithography process for through-silicon vias-fabrication using a double-sided (structured) photomask for mask aligner lithography