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This paper proposes a highly dense reconfigurable architecture that introduces via-switch device, which is a nonvolatile resistive-change switch and is used in crossbar switches. Via-switch is implemented in back-end-of-line layers only, and hence the front-end-of-line (FEoL) layers under the crossbar can be fully exploited for highly dense logic blocks. The proposed architecture uses the FEoL layers for fine-grained lookup tables and coarse-grained arithmetic/memory units for improving performance and compatibility with various applications. A case study of application mapping shows the proposed architecture can reduce the array area by 21.7&#x0025;, thanks to the bidirectional interconnection. Thanks to    $18F^{2}$    footprint and one order of magnitude lower resistivity of via-switch compared to MOS switch, the crossbar density is improved by up to    $26\times $    and the delay and energy in the interconnection are reduced by 90&#x0025; and 94&#x0025; at 0.5-V operation.

Via-Switch FPGA: Highly Dense Mixed-Grained Reconfigurable Architecture With Overlay Via-Switch Crossbars