English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Tools annual

Global: Zendy Free Plan

Global: Zendy Tools monthly

Global: Zendy Plus monthly

Detector readout systems for medium- to large-scale physics experiments, and instruments in some other fields as well, are generally composed of multiple front-end digitizer boards distributed over a certain area. Often, this hardware has to be synchronized to a common reference clock with minimal skew and low jitter. Today's mainstream solutions to precise clock distribution and deterministic latency messaging rely on the capabilities of high-speed serial transceivers (a.k.a. SerDes) embedded in modern field-programmable gate arrays (FPGAs). An alternative option uses distinct clock and data links. This can potentially reach higher synchronization accuracy, at significant hardware expenses. This work reports some first steps to explore a third scheme for clock and synchronous message distribution. Like the standard approach, the same medium is used to convey clock and data, but instead of using today's &#x201C;data-centric&#x201D; links where the recovered clock is only a by-product of a SerDes, this article defines and investigates &#x201C;clock-centric&#x201D; links where, at the opposite, a clock is carried by the link, and synchronous data are embedded into it by a modulation technique. After defining the concepts and principles of data-centric links, experimental studies are presented. Finally, the merits and limitations of the proposed approach are discussed.

Clock-Centric Serial Links for the Synchronization of Distributed Readout Systems