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Junctionless transistors made of silicon have previously been demonstrated experimentally and by simulations. Junctionless devices do not require fabricating an abrupt source-drain junction, and thus, can be easier to implement in aggressive geometries. In this paper, we explore a similar architecture for aggressively scaled devices with the channel consisting of doped carbon nanotubes (CNTs). Gate all around field effect transistor (FET) structures are investigated for n- and p- type doping. Current-voltage characteristics and subthreshold characteristics for a CNT-based junctionless FET is compared with a junctionless silicon nanowire FET with comparable dimensions. Despite the higher on-current of the CNT channels, the device characteristics are poorer compared to the silicon devices due to the smaller CNT bandgap.

First Principle-Based Analysis of Single-Walled Carbon Nanotube and Silicon Nanowire Junctionless Transistors