English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Tools annual

Global: Zendy Free Plan

Global: Zendy Tools monthly

Global: Zendy Plus monthly

We have developed a fabrication technology for superconducting integrated circuits with&#x00A0;Nb-based Josephson junctions. The standard fabrication process with 10 mask levels includes 3&#x00A0;Nb superconducting layers and a Mo resistor layer. The influence of deposition parameters on film stress, electrical properties, and surface roughness were studied systematically. High quality&#x00A0;Nb, Al, Mo, and SiO2 films were successfully deposited for the subsequent fabrication of circuits. The circuit fabrication started with the fabrication of Mo resistors with a target sheet resistance <italic>R</italic>sh of 2 &#x03A9;, followed by the deposition of&#x00A0;Nb&#x002F;Al-AlO<italic>x</italic>&#x002F;Nb trilayer Josephson-junction. The target critical current density <italic>J</italic>c was set at 6 kA&#x002F;cm2. Small-scale circuits such as our standard library cells have been successfully fabricated and tested, confirming the capability of our fabrication technology for superconducting integrated circuits.

Development of Multi-Layer Fabrication Process for SFQ Large Scale Integrated Digital Circuits