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Resistive random access memory (ReRAM)-based computing in-memory (CIM) is a promising solution to overcome the von-Neumann bottleneck in conventional computing architectures. We propose a reconfigurable ReRAM architecture using a novel 4T2R bit-cell that supports non-volatile storage and two types of CIM operations: i) ternary content addressable memory (TCAM) and ii) in-memory dot product (IM-DP) for neural networks. The proposed 4T2R cell occupies a smaller area than prior SRAM-based CIM bit-cells. A <inline-formula> <tex-math notation="LaTeX">$128\times128$ </tex-math></inline-formula> ReRAM macro is designed in 40nm CMOS technology. For TCAM operations, it allows a search word-length of 128 bits. For IM-DP operations, it can compute parallel dot products using binary inputs and ternary weights. The simulated search delay for TCAM operation is 0.92 ns at VDD &#x003D; 0.9 V and the simulated energy efficiency for IM-DP operation is 223.6 TOPS/W at VDD &#x003D; 0.7 V. Monte-Carlo simulations show a standard deviation of 4.9&#x0025; in accumulate operation for IM-DP which corresponds to a classification accuracy of 95.7&#x0025; on the MNIST dataset and 81.7&#x0025; on the CIFAR-10 dataset.

A Reconfigurable 4T2R ReRAM Computing In-Memory Macro for Efficient Edge Applications