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The ferroelectric-metal field-effect transistor with recessed channel (RC-FeMFET) is proposed for one transistor dynamic random-access memory (1T-DRAM). Through technology computer-aided design (TCAD) simulations, the effects of inter-metal insertion on the FeFET with recessed channel (RC-FeFET) is identified. By evaluating electric field (e-field) across interlayer (IL) and memory window (MW), the improvements of program/erase cycling endurance and read current sensing margin (RSM) are verified in the RC-FeMFET. Moreover, considering program voltage (V<sub>W</sub>) and polarization switching time (<inline-formula> <tex-math notation="LaTeX">$\tau _{\mathrm{ p}}$ </tex-math></inline-formula>), the guide line of the RC-FeMFET design is provided in terms of e-field across IL and MW for 1T-DRAM applications.

Ferroelectric-Metal Field-Effect Transistor With Recessed Channel for 1T-DRAM Application