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Single-crystalline silicon (sc-Si) complementary metal–oxide–semiconductor (CMOS) circuits were fabricated on a polyethylene terephthalate (PET) substrate using meniscus force-mediated layer transfer. The introduction of a two-step tapered SiO2 structure formed using low-dose and high-energy pillar shaping ion implantation (I/I) and self-limited SiO2 pillar etching were crucial for obtaining a high transfer yield of 99.86% and simultaneous transfer of both n- and p-channel sc-Si islands to the PET substrate. The fabricated MOS field-effect transistors exhibited a high field effect mobility of 603 cm2 V−1 s−1 (n) and 172 cm2 V−1 s−1 (p), respectively. The CMOS inverters exhibited clear input/output characteristics under a supply voltage of 2.0 V, and high-speed operation of a five-stage ring oscillator (RO) with an operating frequency of 14.6 MHz was realized. Moreover, the oscillation frequency of the RO transferred onto the PET was 3.5 times that of the non-transferred RO owing to the reduction in the parasitic capacitance.

Single-Crystalline Si-CMOS Circuit Fabrication on Polyethylene Terephthalate Substrate by Meniscus Force-Mediated Layer Transfer