English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Zendy Plus

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Zendy Tools

Zendy Open

Transfer functions for the reference clock jitter in a serial link such as the PCI Express 100 MHz reference clock are established for various clock and data recovery circuits (CDRCs). In addition, mathematical interrelationships between phase, period, and cycle-to-cycle jitter are established and phase jitter is used with the jitter transfer function. Numerical simulations are carried out for these transfer functions. Relevant eye-closure/total jitter at a certain bit error rate (BER) level for the receiver is estimated by applying these jitter transfer functions to the measured phase jitter of the reference clock over a range of transfer function parameters. Implications of this new development to serial link reference clock testing and specification formulation are discussed.

Transfer Functions For The Reference Clock Jitter In A Serial Link: Theory And Applications