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This paper reviews our previous theoretical studies and gives further insight into phonon scattering in 3D small nanotransistors using non-equilibrium Green function methodology. The focus is on very small gate-all-around nanowires with Si, GaAs or InGaAs cores. We have calculated phonon-limited mobility and transfer characteristics for a variety of cross-sections at low and high drain bias. The nanowire cross-sectional area is shown to have a significant impact on the phonon-limited mobility and on the current reduction. In a study of narrow Si nanowires we have examined the spatially resolved power dissipation and the validity of Joule's law. Our results show that only a fraction of the power is dissipated inside the drain region even for a relatively large simulated length extension (approximately 30 nm). When considering large source regions in the simulation domain, at low gate bias, a slight cooling of the source is observed. We have also studied the impact of the real part of phonon scattering self-energy on a narrow nanowire transistor. This real part is usually neglected in nanotransistor simulation, whereas we compute its impact on current---voltage characteristic and mobility. At low gate bias, the imaginary part strongly underestimated the current and the mobility by 50 %. At high gate bias, the two mobilities are similar and the effect on the current is negligible.

Impact of phonon scattering in Si/GaAs/InGaAs nanowires and FinFets: a NEGF perspective