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Cache attacks exploit memory access patterns of cryptographicimplementations. Constant-Time implementation techniques have become anindispensable tool in fighting cache timing attacks. These techniques engineerthe memory accesses of cryptographic operations to follow a uniform keyindependent pattern. However, the constant-time behavior is dependent on theunderlying architecture, which can be highly complex and often incorporatesunpublished features. CacheBleed attack targets cache bank conflicts andthereby invalidates the assumption that microarchitectural side-channeladversaries can only observe memory with cache line granularity. In this work,we propose MemJam, a side-channel attack that exploits false dependency ofmemory read-after-write and provides a high quality intra cache level timingchannel. As a proof of concept, we demonstrate the first key recovery attackson a constant-time implementation of AES, and a SM4 implementation with cacheprotection in the current Intel Integrated Performance Primitives (Intel IPP)cryptographic library. Further, we demonstrate the first intra cache leveltiming attack on SGX by reproducing the AES key recovery results on an enclavethat performs encryption using the aforementioned constant-time implementationof AES. Our results show that we can not only use this side channel toefficiently attack memory dependent cryptographic operations but also to bypassproposed protections. Compared to CacheBleed, which is limited to olderprocessor generations, MemJam is the first intra cache level attack applicableto all major Intel processors including the latest generations that support theSGX extension.

MemJam: A False Dependency Attack against Constant-Time Crypto Implementations