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CODES+ISSS focuses on the design of embedded systems hardware, software, and tools. Out of the best CODES+ISSS 2007 papers, we invited the authors of two papers to submit expanded manuscripts for inclusion in this ESWEEK 2007 Special Issue. The first paper, “Locality optimization in a compiler for wireless applications” by Catthoor, Absar, Raghavan, Lambrechts, Li and Jayapala, focuses on the topic of compiler techniques for optimizing locality in program loop nests for applications in the wireless domain. The authors exploit the notion of constraint propagation using a novel partitioning of the problem into an access and layout locality-optimization phase, as opposed to the conventional problem partitioning into temporal and spatial locality optimizations. The approach is demonstrated to yield a significant reduction in external memory accesses when scratchpad memories are deployed effectively. The second paper, “Rethinking the synthesis of buses, data mapping, and memory allocation for MPSoC” by Meyers and Thomas, addresses research in the areas of embedded multiprocessor systems-on-chip, bus architecture synthesis, memory allocation, and data mapping. The authors present a novel approach to address the exploration of the inherently intertwined design space of system partitioning and resource sharing for heterogeneous multiprocessors, with a view to exploiting custom memory and bus architectures. A key strategy employed in their approach considers bus topology first during their simulated annealing formulation for simultaneous data mapping, memory allocation and bus synthesis. The results show impressive reductions in minimizing cost for high-performance designs, compared with traditional approaches that perform bus synthesis separately from the tasks of memory allocation and data mapping.

CODES+ISSS 2007 guest editors’ introduction